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Press release · September 17, 2026 · globenewswire.com

BrainChip Holdings Ltd. Introduces AKD1500 PCIe Development Card

Summary

BrainChip Holdings Ltd. introduced the AKD1500 PCIe development card to make access to its Akida edge AI evaluation available on standard desktop and industrial PCs. The move gives developers an on-device option for testing models built with existing frameworks.

The AKD1500 PCIe card installs in a standard PCIe slot and targets developer workflows that involve validating neuromorphic AI hardware in place of relying on separate paths for evaluation versus deployment. The release also points to an increase in edge devices incorporating edge AI silicon, including industrial sensors, cameras, robots, and wearables.

Built on BrainChip’s AKD1500 Edge AI Co-Processor, the card supports running models built in existing frameworks. The release says Akida can be tested as part of a development pipeline on a server, and that a developer can validate Akida using their own streaming data; it further states that a model validated on the card runs on deployed hardware without change.

The card is available for purchase now through BrainChip’s online store. BrainChip described universal access as covering an evaluation card as well as other AKD1500 forms it previously produced or mentioned, including deployable M.2 modules, packaged and unpackaged silicon, and Akida IP cores for custom ASICs. Sean Hehir, CEO of BrainChip, said, “Our customers no longer have to choose between proving out neuromorphic AI and productizing it,” and added, “Akida is available in every form they need — from card to IP —turning a technology into a complete roadmap for adoption.” Steve Brightfield, chief product officer of BrainChip, said, “The first challenge in evaluating new AI architectures is getting your hands on silicon and tools,” and stated, “If you have a PC with a spare slot, you can be running your own models on Akida this afternoon — and what you execute on that card seamlessly carries through to a module, a chip or IP in your own SoC design. The line of adoption is complete.”

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