Ayar Labs

Ayar Labs is a hardware company that develops in-package optical I/O chiplets and related components for high-bandwidth, low-power data movement in advanced computing systems.

• Optical I/O chiplets and transceivers for in-package optical connectivity (AI infrastructure, High performance computing (HPC) interconnects)
• Electronic-photonic integration platforms for moving data between processors, accelerators, and memory (data center infrastructure)
• Support for co-packaged and in-package optics with standard electrical interfaces (interconnect technology)
• Reference designs and integration support for system and module manufacturers (hardware enablement services)
• Technology targeting Artificial Intelligence (AI), HPC, and data center architectures requiring high bandwidth density (AI infrastructure, HPC networking)

More About Ayar Labs

Ayar Labs focuses on replacing or supplementing traditional electrical I/O between chips and system components with optical interconnects integrated at the package level. Its optical I/O chiplets and associated components are positioned for environments where bandwidth, power efficiency, and I/O density are constraints, such as AI accelerators, HPC nodes, and large-scale data center systems.

The company’s offerings fit into the enterprise IT categories of AI infrastructure, HPC interconnects, and data center networking. Instead of using long-reach electrical Serializer/Deserializer (SerDes) and copper traces for off-package communication, Ayar Labs’ approach brings optical links directly into or next to the compute package. This in-package optics model targets use cases such as processor-to-processor, processor-to-memory, and processor-to-switch connectivity, where traditional electrical interfaces face limits on reach, bandwidth, and power consumption.

Ayar Labs builds on silicon photonics and electronic-photonic integration technologies. Its components typically combine CMOS electronics with photonic devices such as modulators, detectors, and integrated waveguides to convert electrical signals to optical signals and back. These devices are designed to interface with standard electrical I/O protocols at the chip boundary and then translate those data streams into optical links carried over fiber. The overall architecture supports very high aggregate bandwidth per package with power characteristics that are intended to be lower than comparable electrical-only solutions at equivalent reach.

From a system architecture standpoint, Ayar Labs’ technology can integrate into multi-chip modules, 2.5D/3D packages, and co-packaged optics (CPO) designs, where optical transceivers System Integration Testing (SIT) close to switch or compute ASICs. The optical I/O chiplets can connect to external optical cables or fiber-based backplanes, enabling rack-level or row-level connectivity within data centers without relying exclusively on conventional pluggable transceivers at the faceplate. This positioning aligns the company with infrastructure strategies aiming to increase rack-level bandwidth, reduce power per bit, and support denser AI and HPC clusters.

In enterprise and institutional deployments, Ayar Labs’ offerings are relevant to hardware vendors, hyperscale cloud providers, and research institutions designing custom systems for AI training, scientific computing, or large-scale simulation. The company provides not only chiplets and photonic components but also reference designs, integration guidance, and collaboration with ecosystem partners, allowing system integrators and Application-Specific Integrated Circuit (ASIC) designers to incorporate optical I/O into their roadmaps. Within a directory or marketplace taxonomy, Ayar Labs maps to categories such as optical interconnects, silicon photonics, co-packaged optics, AI infrastructure hardware, and high-bandwidth data center networking components.